View MC3635_8899924.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

mc3 635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 1 / 81 ? 201 5 mcube inc. all rights reserved. general description the mc 3 6 35 is a n ultra - low power, low - noise, integrated digital output 3 - axis accelerometer with a feature set optimized for wearables and consumer product motion sensing. applications include wearable consumer products, iot devices, user interface control, gaming motion input, electronic compass tilt compensation for cell phones, game controllers, remote controls and portable media products. low noise and low power are inherent in the monolithic fabrication approach, where the mems a ccelerometer is integrated in a single - chip with the electronics integrated circuit. in the MC3635 the internal sample rate can be set from 1 4 to 1300 samples / second. specific tap or sample acquisition conditions can trigger an interrupt to a remote mcu . alternatively, the device supports the reading of sample and event status via polling. features range, sampling & power ? 2 , 4, 8, 12 or 16 g ranges ? 8, 10 or 12 - bit resolution with fifo o 14 - bit single samples ? sample rate 1 4 - 1300 samples/sec o sample t rig ger via internal oscillator, clock pin or software command ? sniff and wake modes o 0. 4 a s niff current @ 6hz o separate or combined sniff/wake ? ultra - low power with 32 sample fifo o 0.9 a typical current @ 25hz o 1.6 a typical current @ 50 hz o 2.8 a typical curren t @ 100hz o 36 a typical current @ 1300hz simple system integration ? i2c interface, up to 1 m hz ? spi interface, up to 4 mhz ? 1.6 1.6 0.9 4 mm 10 - pin package ? single - chip 3d silicon mem s ? low noise to 2.3mgrms
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 2 / 81 ? 201 5 mcube inc. all rights reserved. t able o f contents 1 order information ................................ ................................ ................................ ............. 5 2 functional block diagram ................................ ................................ ................................ 6 3 packaging and pin descrip tion ................................ ................................ ........................ 7 3.1 package outline ................................ ................................ ................................ ................... 7 3.2 package orientation ................................ ................................ ................................ ............. 8 3.3 pin description ................................ ................................ ................................ ..................... 9 3.4 typical application circuits ................................ ................................ ................................ 10 3.5 tape and reel ................................ ................................ ................................ ................... 13 4 specifications ................................ ................................ ................................ ................. 15 4.1 absolute maximum ratings ................................ ................................ ................................ 15 4.2 sensor characteristics ................................ ................................ ................................ ....... 16 4.3 electrical and timing c haracteristics ................................ ................................ .................. 17 4.3.1 electrical power and internal characteristics ................................ ....................... 17 4.3.2 electrical characteristics ................................ ................................ ...................... 18 4.3.3 i2c timing c haracteristics ................................ ................................ ................... 19 4.3.4 spi timing characteristics ................................ ................................ ................... 20 5 general operation ................................ ................................ ................................ ......... 21 5.1 sensor sampling ................................ ................................ ................................ ................ 21 5.2 offset and gain calibration ................................ ................................ ................................ 21 5.3 reset ................................ ................................ ................................ ................................ . 21 5.4 reload ................................ ................................ ................................ ............................... 22 5.5 operational modes ................................ ................................ ................................ ............. 23 5.6 mode state machine flow ................................ ................................ ................................ .. 24 6 interfaces ................................ ................................ ................................ ....................... 25 6.1 spi vs i2c operation modes ................................ ................................ .............................. 25 6.2 i2c physical interface ................................ ................................ ................................ ........ 25 6.3 i2c message format ................................ ................................ ................................ .......... 26 6.4 spi physical interface ................................ ................................ ................................ ........ 27 6.5 spi 3 - wire mode ................................ ................................ ................................ ................ 27 6.6 spi protocol ................................ ................................ ................................ ....................... 27 6.7 spi register write cycle - single ................................ ................................ ....................... 28
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 3 / 81 ? 201 5 mcube inc. all rights reserved. 6.8 spi registe r write cycle - burst ................................ ................................ ........................ 28 6.9 spi register read cycle - single ................................ ................................ ....................... 28 6.10 spi register read cycle - burst ................................ ................................ ........................ 29 6.11 spi status option ................................ ................................ ................................ ............... 29 7 register interface ................................ ................................ ................................ .......... 30 7.1 register summary ................................ ................................ ................................ ............. 31 7.2 (0x00) extended status register 1 ................................ ................................ ..................... 33 7.3 (0x01) exte nded status register 2 ................................ ................................ ..................... 34 7.4 (0x02 C 0x07) xout, yout & zout data output registers ................................ ............. 35 7.5 (0x08) status register 1 ................................ ................................ ................................ ..... 36 7.6 (0x09) status register 2 ................................ ................................ ................................ ..... 38 7.7 (0x0d) feature register 1 ................................ ................................ ................................ .. 40 7.8 (0x0e) feature register 2 ................................ ................................ ................................ .. 42 7.9 (0x0f) initialization register 1 ................................ ................................ ............................ 45 7.10 (0x10) mode control register ................................ ................................ ............................ 46 7.11 (0x11) rate register 1 ................................ ................................ ................................ ....... 48 7.12 (0x12) sniff control register ................................ ................................ .............................. 50 7.13 (0x13) sniff threshold control register ................................ ................................ ............. 53 7.14 (0x14) sniff configuration register ................................ ................................ .................... 56 7.15 (0x15) range and resolution control register ................................ ................................ .. 58 7. 16 (0x16) fifo control register ................................ ................................ ............................. 60 7.17 (0x17) interrupt control register ................................ ................................ ........................ 61 7.18 (0x1a) initialization register 3 ................................ ................................ ............................ 63 7.19 (0x1b) scratchpad register ................................ ................................ ............................... 64 7.20 (0x1c) power mod e control register ................................ ................................ ................. 65 7.21 (0x20) drive motion x register ................................ ................................ .......................... 66 7.22 (0x21) drive motion y register ................................ ................................ .......................... 67 7.23 (0x22) drive motion z register ................................ ................................ ........................... 68 7.24 (0x24) reset register ................................ ................................ ................................ ........ 69 7.25 (0x28) initialization register 2 ................................ ................................ ............................ 70 7.26 (0x29) trigger count register ................................ ................................ ............................ 71 7.27 (0x2a C 0x2b) x - axis offset registers ................................ ................................ ............... 72 7.28 (0x2c C 0x2d) y - axis offset registers ................................ ................................ .............. 73 7.29 (0x2e C 0x2f) z - axis offset registers ................................ ................................ ............... 74
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 4 / 81 ? 201 5 mcube inc. all rights reserved. 7.30 (0x2b & 0x30) x - axis gain registers ................................ ................................ ................. 75 7.31 (0x2d & 0x31) y - axis gain registers ................................ ................................ ................. 76 7.32 (0x2f & 0x32) z - axis gain registers ................................ ................................ ................. 77 8 index of tables ................................ ................................ ................................ .............. 78 9 revision history ................................ ................................ ................................ ............. 80 10 legal ................................ ................................ ................................ .............................. 81
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 5 / 81 ? 201 5 mcube inc. all rights reserved. 1 order information table 1 . order information part number resolution order number package shipping MC3635 8 to 1 4 - bit MC3635 lga - 1 0 tape & reel, 5ku
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 6 / 81 ? 201 5 mcube inc. all rights reserved. 2 functional block dia gram figure 1 . block diagram a / d c o n v e r t e r ( s i g m a d e l t a ) c t o v v p p v d d i o g n d r e g u l a t o r s a n d b i a s o s c i l l a t o r / c l o c k g e n e r a t o r m o d e l o g i c s p i / i 2 c s l a v e i n t e r f a c e i n t e r r u p t x y z o t p m e m o r y r e g i s t e r s ( 6 4 x 8 ) s c k _ s c l d i n _ s d a i n t n o f f s e t / g a i n a d j u s t x , y , z d a t a p a t h s s e n s o r s r a n g e & s c a l e e v e n t s n i f f v d d d o u t _ a 1 c s n f i f o 1 4 1 2 s t a t u s
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 7 / 81 ? 201 5 mcube inc. all rights reserved. 3 packaging and pin de scription 3.1 package outline figure 2 . package outline and mechanical dimensions symbol min. nor. max. total thickness a 0.88 0.94 1 d e lead width w 0.15 0.2 0.25 lead length l 0.25 0.3 0.35 lead pitch e lead count n d1 e1 body center to contact lead sd package edge tolerance aaa mold flatness bbb coplanarity ddd notes: parallelism measurement shall exclude any effect of mark on top surface of package. 0.2 0.08 body size edge lead center to center 10 1.2 bsc 1.1 bsc 0.2 bsc 0.07 common dimensions 1.6 bsc 1.6 bsc 0.4 bsc 1
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 8 / 81 ? 201 5 mcube inc. all rights reserved. 3.2 package orientation fig ure 3 . package orientation figure 4 . package axis reference d i r e c t i o n o f e a r t h g r a v i t y a c c e l e r a t i o n x o u t = - 1 g y o u t = 0 g z o u t = 0 g x o u t = + 1 g y o u t = 0 g z o u t = 0 g x o u t = 0 g y o u t = - 1 g z o u t = 0 g x o u t = 0 g y o u t = + 1 g z o u t = 0 g x o u t = 0 g y o u t = 0 g z o u t = + 1 g x o u t = 0 g y o u t = 0 g z o u t = - 1 g t o p v i e w s i d e v i e w p i n 1 t o p a . b . c . d . e . f . - x + x + y - y + z - z
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 9 / 81 ? 201 5 mcube inc. all rights reserved. 3.3 pin description table 2 . pin description notes: 1) when using the i2c interface, t his pin requires a pull - up resistor, typically 4. 7k to pin vddio . refer to i2c specification for fast - mode devices. higher resistance values can be used (typically done to reduce current leakage) but such applications are outside the scope of this datasheet. 2) this pin can be configured by software to ope rate either as an open - drain output or push - pull output. if set to open - drain, then it requires a pull - up resistor, typically 4. 7k to pin vddio . 3) intn pin polarity is programmable . pin name function 1 dout _a1 spi d ata output i2c address bit 1 2 din_sda 1 spi data in i2c serial d ata input/output 3 nc no connect 4 vpp connect to gnd 5 intn 2 interrupt active low 3 6 vddio power supply for interface 7 vdd power supply for internal 8 gnd ground 9 csn spi chip select 10 sck_scl 1 spi clock i2c serial clock input
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 10 / 81 ? 201 5 mcube inc. all rights reserved. 3.4 t ypical a pplication c ircuit s figure 5 . typical i2c application circuit in typical applications, the interface power supply may contain significant noise from external sources and other circuits which should be kept away from the device . therefore, for some applications a lowe r - noise power supply might be desirable to power the device . t o f a s t - m o d e i 2 c c i r c u i t r y 1 } n o t e 1 : r p a r e t y p i c a l l y 4 . 7 k ? p u l l u p r e s i s t o r s t o v d d i o , p e r i 2 c s p e c i f i c a t i o n . w h e n v d d i o i s p o w e r e d d o w n , d i n _ s d a a n d s c k _ s c l w i l l b e d r i v e n l o w b y i n t e r n a l e s d d i o d e s . n o t e 2 : a t t a c h t y p i c a l 4 . 7 k ? p u l l u p r e s i s t o r i f i n t n i s d e f i n e d a s o p e n - d r a i n . f r o m p o w e r s u p p l y d o u t _ a 1 d i n _ s d a n c v p p c s n g n d v d d v d d i o s c k _ s c l i n t n 0 . 1 f p l a c e c a p c l o s e t o v d d a n d g n d o n p c b ( o p t i o n a l ) t o m c u i n t e r r u p t i n p u t 2 1 2 3 4 9 8 7 6 5 1 0 r p r p r p
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 11 / 81 ? 201 5 mcube inc. all rights reserved. figure 6 . typical 4 - wire spi application circuit t o 4 - w i r e s p i m a s t e r n o t e r p : a t t a c h t y p i c a l 4 . 7 k ? p u l l u p r e s i s t o r i f i n t n i s d e f i n e d a s o p e n - d r a i n . f r o m p o w e r s u p p l y d o u t _ a 1 d i n _ s d a n c v p p c s n g n d v d d v d d i o s c k _ s c l i n t n 0 . 1 f p l a c e c a p c l o s e t o v d d a n d g n d o n p c b ( o p t i o n a l ) t o m c u i n t e r r u p t i n p u t 1 2 3 4 9 8 7 6 5 1 0 r p
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 12 / 81 ? 201 5 mcube inc. all rights reserved. figure 7 . typical 3 - wire sp i application circuit t o 3 - w i r e s p i m a s t e r n o t e r p : a t t a c h t y p i c a l 4 . 7 k ? p u l l u p r e s i s t o r i f i n t n i s d e f i n e d a s o p e n - d r a i n . f r o m p o w e r s u p p l y d o u t _ a 1 d i n _ s d a n c v p p c s n g n d v d d v d d i o s c k _ s c l i n t n 0 . 1 f p l a c e c a p c l o s e t o v d d a n d g n d o n p c b ( o p t i o n a l ) t o m c u i n t e r r u p t i n p u t 1 2 3 4 9 8 7 6 5 1 0 r p
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 13 / 81 ? 201 5 mcube inc. all rights reserved. 3.5 tape and reel devices are shipped in reels, in standard cardboard box packaging. see figure 8 . MC3635 tape dimensions and figure 9 . mc 3 6 35 reel dimensions . figure 8 . MC3635 tape dimensions
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 14 / 81 ? 201 5 mcube inc. all rights reserved. ? dimensions in mm. figure 9 . mc 3 6 35 reel dimensions
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 15 / 81 ? 201 5 mcube inc. all rights reserved. 4 specifications 4.1 absolute maximum rat ings param eters exceeding the absolute maximum ratings may permanently damage the device. rating symbol minimum / maximum value unit supply voltages pin s vdd , vddio - 0.3 / +3.6 v acceleration, any axis, 100 s g max 10000 g ambient operating temperature t op - 40 / +85 ? c storage temperature t stg - 40 / +125 ? c esd human body model hbm 2000 v input voltage to non - power pin pins csn, din_sda, dout _a1 , intn, and sck_ scl - 0.3 / (vdd io + 0.3) or 3.6 whichever is lower v table 3 . absolute maximum ratings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 16 / 81 ? 201 5 mcube inc. all rights reserved. 4.2 sensor characteristics vdd = vddio = 1 .8v, t op = 25 ? c unless otherwise noted parameter conditions min typ max unit acceleration range 2 4 8 12 16 g sensitivity 8 4096 lsb/g sensitivity temperature coefficient 1 0.15 %/ ? c ze ro - g offset post - board mount , odr <= 4 00hz post - board mount, odr > 4 00hz 40 150 mg zero - g offset temperature coefficient 1 1 mg/ ? c noise 1 @ 100hz wake modes: ultra - l ow power, avg x&y&z: low po wer, avg x&y&z: precision, avg x&y&z: sniff modes: ultra - low power, avg x&y&z: low power, avg x&y&z: precision, avg x&y&z: 6.5 4.4 1. 7 40 25 5 mg rms nonlinearity 1 1 % fs cross - axis sensitivity 1 between any two axes 2 % table 4 . sensor characteristics 1 values are based on device characterization, not tested in production.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 17 / 81 ? 201 5 mcube inc. all rights reserved. 4.3 electrical and timing characteristics 4.3.1 electrical pow er and internal characteris tics parameter conditions symbol min typ max unit internal voltage 2 pin vdd rise - time < 4 0msec vdd 1.7 1.8 3.6 v i/o voltage pin vddio rise - time < 4 0msec vddio 1.7 1.8 3.6 v test condition: vdd = vddio = 1 .8v, t op = 25 ? c unless otherwise noted parameter conditions symbol min typ max unit s leep current i dd slp 0. 1 a sniff current 6hz i ddsnf 0. 4 a selected w ake supply current (see also 7.11 ) precision, 14hz ultra - low power, 25hz ultra - low power, 50hz low power, 5 4 hz precision, 5 5 hz ultra - low power, 100hz precision, 100hz low power, 2 1 0hz ultra - low power, 130 0hz i dd14 p i d d 2 5 ulp i dd 50 u lp i dd5 4 lp i dd5 5 p i dd100 ulp i dd100p i dd2 1 0lp i dd1300ulp 5 0.9 1.6 2 . 7 18 2. 8 36 11 36 a pad leakage per i/o pad i pad 0.01 a table 5 . electrical characteristics C voltage and current 2 min and max limits are hard limits without additional tolerance.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 18 / 81 ? 201 5 mcube inc. all rights reserved. 4.3.2 electrical character istics parameter symbol min max unit low level input voltage vil - 0.5 0.3* vdd io v high level input voltage vih 0.7* vdd io - v hysteresis of schmitt trigger inputs vhys 0.05* vdd io - v output voltage, pin intn, iol 2 ma iol 1 ma 3 ci - 10 pf table 6 . electrical characteristics C interface notes: ? if multiple slaves are connected to the i2c signals in addition to this device, only 1 pull - up resistor on each of sda and scl shoul d exist. also, care must be taken to not violate the i2c specification for capacitive loading. ? when pin vddio is not powered and set to 0v , intn, din_ sda and sck_ scl will be held to vdd io plus the forward voltage of the internal static protection diodes, t ypically about 0.6v. ? when pin vddio is disconnected from power or ground (e.g. hi - z), the device may become inadvertently powered up through the esd diodes present on other powered signals. 3 values are ba sed on device characterization , not tested in production.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 19 / 81 ? 201 5 mcube inc. all rights reserved. 4.3.3 i2c timing character istics figure 10 . i2c interface timing parameter description standard mode fast mode fast mode plus units min max min max f scl scl clock frequency 0 100 0 400 0 10 00 khz t hd; sta hold time (repeated) start condition 4.0 - 0.6 - 0. 2 6 - s t low low period of the scl clock 4.7 - 1.3 - 0.5 - s t high high period of the scl clock 4.0 - 0.6 - 0. 2 6 - s t su;sta set - up time for a repeated start condition 4.7 - 0.6 - 0. 2 6 - s t hd;dat data hold time 5.0 - - - - - s t su;dat data set - up time 250 - 100 - 5 0 - ns t su;sto set - up time for stop condition 4.0 - 0.6 - 0. 2 6 - s t buf bus free time between a stop and start 4.7 - 1.3 - 0.5 - s table 7 . i2c timing characteristics note: values are based on i2c specificati on requirements, not tested in production.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 20 / 81 ? 201 5 mcube inc. all rights reserved. 4.3.4 spi timing character istics figure 11 . spi interface timing waveform symbol parameter value units min typ max tc spi sck_scl clock cycle 500 ns fc spi sck_scl clock frequency (v ddio==3.3 to 3.6v) spi sck_scl clock frequency (vddio==1.7 to 3.3v) 4 4 2.5 mhz mhz tcs_su spi csn setup time 6 ns tcs_hld spi csn hold time 8 ns tdi_su spi din_sda input setup time 5 ns tdi_hld spi din_sda input hold time 15 ns tdo_vld spi dout_a1 valid output time 50 ns tdo_hld spi dout_a1 output hold time 9 ns tdo_dis spi dout_a1 output disable time 50 ns table 8 . spi interface timing parameters 4 values are based on device characterization, not tested in production.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 21 / 81 ? 201 5 mcube inc. all rights reserved. 5 general operation the device supports the reading of samples and device status upon interrupt or via polling. it contains a 12 - bit 32 sample fifo with programmable watermark. the device is internally clocked but also includes a manual trigger mode. it can be put into several low power modes, depending upon the desir ed sensing application. the device can run in full - featured mode from its fast internal clock or from a slower heartbeat clock, with limited functionality and at lower power. the device can connect as a slave to either a spi or i2c master. 5.1 sensor sampling x, y and z accelerometer data is stored in registers xout, yout, and zout registers. the data is represented as 2s complement format. the desired resolution and full scale acceleration range are set in the range_c register. 5.2 offset and gain cali bration the default digital offset and gain calibration data can be read from the device, if necessary, in order to reduce the effects of post - assembly influences and stresses which may cause the sensor readings to be offset from their factory values. 5.3 reset the devi ce can be completely reset via an i2c or spi instruction. writing register 0x24 with 0x40 (bit 6) causes a power - on reset operation to execute. no attempt should be made to access registers within 1msec after issuing this operation. the device must be plac ed in standby mode before executing the reset. the pin dout_a1 is sampled for the purposes of setting the i2c device address after this reset operation. note: immediately after a reset or power - up event, several registers must be written with initializatio n values as shown below: step address value which must be written 1 0x0f 0x42 2 0x20 0x01 3 0x21 0x80 4 0x28 0x00 5 0x1a 0x00
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 22 / 81 ? 201 5 mcube inc. all rights reserved. 5.4 reload the device registers can be reloaded from otp via an i2c or spi instruction. writing register 0x24 with 0x80 (bit 7 ) causes a reload operation to execute. the contents of otp are reloaded into the register set. however any non - loaded register locations will not be affected. no attempt should be made to access registers within 1msec after issuing this operation. the dev ice must be placed in standby mode before executing the reset. the pin dout_a1 is sampled for the purposes of setting the i2c device address after this reload operation.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 23 / 81 ? 201 5 mcube inc. all rights reserved. 5.5 operational modes the device has various modes of operation as described below: mode d escription and comments sleep sleep is the lowest power mode. the internal regulator s are enabled, and much of the chip is disabled. the sleep mode is the default por mode. this command is available at any time, although up to three periods of the interna l heartb eat clock may be required to complete the transition. standby standby is a low power mode. all internal regulators are enabled, and internal main and heartbeat clocks are enabled. the default standby frequency for the heartbeat clock is ~500 hz. t rig mode operation can be executed only from this mode. software must change the mode to sleep or standby in register 0x10 before writing to any other register. sniff sniff is a lower power, limited activity detection mode; sniff circuitry is enabled and sniff - only sampling is enabled. there are no fifo operations, and hardware will automatically transition to cwake mode upon activity detection. cwake cwake or continuous wake is the typical xyz sampling mode. sample data is written to the output registe rs , or the fifo when enabled. h ardware will automatically transition to cwake mode upon sniff activity detection. swake sniff and cwake circuitry are both active simultaneously. sniff circuitry is enabled and xyz samples are written to the output register s , or the fifo when enabled. trig the device produces a fixed numbe r of samples, between 1 and 25 4, or continuously . this mode ignores the setting in the odr, but uses the stb_rate[2:0] clock setting as the sampling rate. the trigger can be set to come fr om the external pin intn or a write to register bit 0x10[ 7 ]. table 9 . operational modes
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 24 / 81 ? 201 5 mcube inc. all rights reserved. 5.6 mode state machine flow figure 12 . mode operational flow shows the op erational mode flow for the device. the device defaults to sleep mode following power - on. mode transitions occur at an approximate rate of ~500hz. depending on the operation, the mode state machine may trigger events that auto - clear or set the mctrl [2:0] b its in register 0x10 after a particular command is chosen. figure 12 . mode operational flow s t a n d b y ( d e l a y < 3 m s e c ) o r s l e e p ( d e l a y < 1 0 m s e c ) a c t i v i t y ? t r i g s w a k e s t a n d b y s w a k e o d r t a k e n f r o m r 1 1 t r i g y s n i f f s n i f f s t a n d b y n t r i g _ c m d 0 x 1 0 [ 7 ] o r e x t e r n a l s i g n a l o d r t a k e n f r o m r 1 2 c w a k e s t a n d b y c w a k e o d r t a k e n f r o m r 1 1 w h e n e n a b l e d d o : ? s e n d o u t i n t e r r u p t ? f r e e z e f i f o a c t i v i t y ? y n o d r f r o m s t a n d b y c l o c k r 1 2 l o o p u n t i l c o u n t = t r i g c o u n t o r m o d e c h a n g e d
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 25 / 81 ? 201 5 mcube inc. all rights reserved. 6 interface s 6.1 spi vs i2c operation modes the device contains both i2c and spi slave interfaces which share c ommon pins. however, only one interface can be active for correct device operation. once the device completes por or a hard reset, both interfaces are active. after power - up and any reset of the device, the first transaction to the device must be writing t o the selected enable bit, either i2c_en or spi_en in register 0x 0d . the situation where bits are set at the same time must be avoided or unstable device operation could occur. to keep the disabled interface from interfering in future transactions, t he corresponding enable bit must be set in the register set. for example, if the 4 - wire spi interface is to be active, writ e a value of 0x80 to register 0x 0d. 6.2 i2c physical interfa ce the i2c slave interface operates at a maximum speed of 1 mhz in i2c fas t mode plus . the sda (data) is an open - drain, bi - directional pin and the scl (clock) is an input pin. the device always operates as an i2c slave. an i2c master initiates all communication and data transfers and generates the sck_scl clock that synchronize s the data transfer. the i2c device address depends upon the settings of various registers and pins as shown in the table below. an i2c master initiates all communication and data transfers and generates the sck_scl clock that synchronizes the data transfe r. the i2c device address depends upon the state of pin dout_a1 during power - up as shown in the table below. 7 - bit device id 8 - bit address ( write ) 8 - bit address ( read ) dout_a1 level upon power - up 0x4c (0b1001100) 0x98 0x99 gnd 0x6c (0b1101100) 0xd8 0xd9 vdd table 10 . i2c address selection the i2c interface remains active as long as power is applied to the vddio pin. in standby mode the device responds to i2c read and write cycles, but interrupts cannot be cleared. all registers c an be written in the sleep or standby mode s , but in cwake only the (0x10) mode control register can be modified.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 26 / 81 ? 201 5 mcube inc. all rights reserved. internally, the registers which are used to store samples are clocked by the sample clock and gated by i2c activity. therefore, in order to allow the device to collect and present samples in the sample registers at least one i2c stop condition must be present between samples. refer to the i2c specification for a detailed discussion of the protocol. per i2c requirements, when the i2c interface is enabled, din_sda is an open drain, bi - directional pin. pins sck_scl and din_sda each require an external pull - up resistor, typically 4.7k. 6.3 i2c message format note: a t least one i2c stop condition must be present between samples in order for the device to update the sample data registers. the device uses the following general format for writing to the internal registers. the i2c master generates a start condition, and then supplies the 7 - bit device id. the 8th bit is the r/w# flag (write cycle = 0). the device pulls din_sda low during the 9th clock cycle indicating a positive ack. the second byte is the 8 - bit register address of the device to access, and the last byte is the data to write. figure 13 . i2c message format, write cycle, single register write in a read cycle, the i2c master writes the device id (r/w#=0) and register address to be read. the master issues a restart condition and then writes the device id with the r/w# flag set to 1. the device shifts out the contents of the register address. figure 14 . i2c message format, read cycle, single register read the i2c master may write or read consecutive register address es by writing or reading additional bytes after the first access. the device will internally increment the register address. note: see (0x0e) feature register 2 for address wrap details . 1 1 0 1 0 1 1 0 a c k r 7 r 6 r 5 r 4 r 1 r 3 r 2 r 0 d 7 d 6 d 5 d 4 d 1 d 4 d 2 d 0 p s a c k a c k s t a r t d e v i c e i d r / w # a c k / n a k r e g i s t e r a d d r e s s r e g i s t e r d a t a t o w r i t e s t o p a c k / n a k a c k / n a k i 2 c m a s t e r ( t o s e n s o r ) i 2 c s l a v e ( f r o m s e n s o r ) 1 1 0 1 0 1 1 0 a c k r 7 r 6 r 5 r 4 r 1 r 3 r 2 r 0 r s a c k i 2 c m a s t e r ( t o s e n s o r ) i 2 c s l a v e ( f r o m s e n s o r ) s t a r t d e v i c e i d r / w # a c k / n a k r e g i s t e r a d d r e s s r e s t a r t a c k / n a k d 7 d 6 d 5 d 4 d 1 d 3 d 2 d 0 n a k r e a d d a t a b y t e n a k 1 1 0 1 0 1 1 1 a c k d e v i c e i d r / w # a c k / n a k p s t o p
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 27 / 81 ? 201 5 mcube inc. all rights reserved. 6.4 s pi physical interfac e the device always operates as an spi slave. an spi master must initiate all communication and data transfers and generate the sck_scl clock that synchronizes the data transfer. the csn pin must be pulled up to vddio when the spi inte rface is not in use. the spi interface can operate in 3 - wire or 4 - wire mode. 6.5 spi 3 - wire mode spi 3 - wire mode is disabled by default. to enable 3 - wire mode, the first write to the device should immediately enable this feature in register (0x0d) feature register 1 . in 3 - wire mode the pins dout_a1 and din_sda must be connected on the pcb. anytime there is a reset to the device, a por event, or a power cycle the spi 3 - wire configuration will reset to 4 - wire mode. 6.6 spi pr otocol the general protocol for the spi interface is shown in the figure s below. the falling edge of csn initiates the start of the spi bus cycle. the first byte of the transaction is the command/address byte. because t he register address space is 64 locat ions , a total of 6 address bits are required for each spi bus cycle. during clock 1, the r/w# bit is set to 0 for a write cycle or 1 for a read cycle. the interface supports 2 types of addressing: 1 - byte (typically used) and 2 - byte (to support legacy hardware). in the case of 2 - byte addressing, the bits occurring during clocks 2 and 9 - 16 must be driven to 0 for the address to be correctly decoded. each read or write transaction always requires a minimum of 16 or 24 cycles of the s ck_scl pin . when th e spi master is writing data, data may change when the clock is low, and must be stable on the clock rising edge. similarly, output data written to the spi master is shifted out on the falling edge of clock and can be latched by the master on the rising ed ge of the clock. serial data in or out of the device is always msb first. figure 15 . general spi protocol, 1 - byte address figure 16 . general spi pr otocol, 2 - byte address (legacy) 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 r / w 1 a 5 a 4 a 3 a 2 a 1 a 0 d i n 7 d i n 6 d i n 5 d i n 4 d i n 3 d i n 2 d i n 1 d i n 0 d o 7 d o 6 d o 5 d o 4 d o 3 d o 2 d o 1 d o 0 c s n s c k _ s c l d i n _ s d a d o u t _ a 1 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 r / w 0 a 5 a 4 a 3 a 2 a 1 a 0 d i n 7 d i n 6 d i n 5 d i n 4 d i n 3 d i n 2 d i n 1 d i n 0 d o 7 d o 6 d o 5 d o 4 d o 3 d o 2 d o 1 d o 0 c s n s c k _ s c l d i n _ s d a d o u t _ a 1 1 7 1 8 2 2 1 9 2 1 2 0 2 3 2 4 0 0 0 0 0 0 0 0
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 28 / 81 ? 201 5 mcube inc. all rights reserved. note: either 1 - byte or 2 - byte addressing may be used for any spi transaction , although for simplicity, the remaining timing diagrams show only 1 - byte addressing. 6.7 spi register write c ycle - single a single register write cons ists of a 16 - clock transaction. as described above, the first bit is set to 0 indicating a register write followed by the register address. figure 17 . spi register write cycle - single 6.8 spi r e gister w rite cycle - burst a burst (m ulti - byte ) register write cycle uses the address specified at the beginning of the transaction as the starting register address. internally the address will auto - increment to the next consecutive address for each additional byt e (8 - clocks) of data written beyond clock 8 . note: see (0x0e) feature register 2 for address wrap details . figure 18 .spi register writ e cycle - burst (2 - register burst example) 6.9 spi register read cycle - single a single register read consists of a 16 - clock transaction. as described above, the first bit is set to 1 indicating a register read followed by the register address. figure 19 . spi register read cycle - single 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 0 1 a 5 a 4 a 3 a 2 a 1 a 0 d i n 7 d i n 6 d i n 5 d i n 4 d i n 3 d i n 2 d i n 1 d i n 0 c s n s c k _ s c l d i n _ s d a d o u t _ a 1 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 2 2 1 9 2 1 2 0 2 3 2 4 1 a 5 a 4 a 3 a 2 a 1 a 0 0 c s n s c k _ s c l d i n _ s d a d o u t _ a 1 d i n 7 d i n 6 d i n 5 d i n 4 d i n 3 d i n 2 d i n 1 d i n 0 d i n 1 5 d i n 1 4 d i n 1 3 d i n 1 2 d i n 1 1 d i n 1 0 d i n 9 d i n 8 d a t a f o r r e g i s t e r n d a t a f o r r e g i s t e r n + 1 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 1 a 5 a 4 a 3 a 2 a 1 a 0 d o 7 d o 6 d o 5 d o 4 d o 3 d o 2 d o 1 d o 0 c s n s c k _ s c l d i n _ s d a d o u t _ a 1
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 29 / 81 ? 201 5 mcube inc. all rights reserved. 6.10 spi register read cy cle - burst a burst ( multi - byte ) register read cycle uses the address specified at the beginning of the transaction as the starting register address . internally the address will auto - increment to the next consecutive address for each additional byte (8 - clocks) of data read beyond clock 8. note: see (0x0e) feature register 2 for address wrap details . figure 20 . spi register read cycle - burst (2 register burst example) 6.11 spi status option the device supports an optional spi status feature, only in spi 4 - wire mode. this feature is enabl ed in register (0x0e) feature register 2 . during the first 6 - bits of any spi transaction (immediately after the falling edge of csn), the dout_a1 pin will output six status bits related to the device. following the 6th clock cycle, the device will float the dout_a1 pin before a possible read cycle begins. the status bits sent are shown below: bit 7 (first out) bit6 bit5 bit 4 bit 3 bit 2 bit 1 bit 0 (last out) int_pend fifo_th resh fifo_full fifo_empty new_data wa ke 0 0 figure 21 . spi status bits 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 2 2 1 9 2 1 2 0 2 3 2 4 1 a 5 a 4 a 3 a 2 a 1 a 0 1 c s n s c k _ s c l d i n _ s d a d o u t _ a 1 d i n 7 d i n 6 d i n 5 d i n 4 d i n 3 d i n 2 d i n 1 d i n 0 d i n 1 5 d i n 1 4 d i n 1 3 d i n 1 2 d i n 1 1 d i n 1 0 d i n 9 d i n 8 d a t a f r o m r e g i s t e r n d a t a f r o m r e g i s t e r n + 1 1 a d r a 5 a 4 a 3 a 2 a 1 a 0 d i n 7 d i n 6 d i n 5 d i n 4 d i n 3 d i n 2 d i n 1 d i n 0 f t h f u l l m t y n e w w a k e 0 0 i n t p i n t _ p e n d f i f o _ t h r e s h f i f o _ f u l l f i f o _ e m p t y n e w _ d a t a w a k e c s n s c k _ s c l d i n _ s d a d o u t _ a 1 r / w d o 7 d o 6 d o 5 d o 4 d o 3 d o 2 d o 1 d o 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 a n y s p i t r a n s a c t i o n
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 30 / 81 ? 201 5 mcube inc. all rights reserved. 7 register interface the device has a simple register interface which allows an spi or i2c master to configure and monitor all aspects of the device. this section lists an overview of user programmable registers. by convention, bit 0 is the least significant bit (lsb) of a byte register.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 31 / 81 ? 201 5 mcube inc. all rights reserved. 7.1 register summary addr name description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 4 0x00 ext_stat_1 extended status 1 resv resv resv resv i2c_ad0 resv resv resv 0x00 r 0x01 ext_stat_2 extended status 2 sniff_ detect sniff_en otp_ busy resv resv 1 pd_clk_ stat ovr_ data 0x04 r 0x02 xout_lsb xout_lsb xout[7] xout[6] xout[5] xout[4] xout[3] xout[2] xout[1] xout[0] 0x00 r 0x03 xout_msb xout_msb xout[15] xout[14] xout[13] xout[12] xout[11] xout[10] xout[9] xout[8] 0x00 r 0x04 yout_lsb yout_lsb yout[7] yout[6] yout[5] yout[4] yout[3] yout[2] yout[1] yout[0] 0x00 r 0x05 yout_msb yout_msb yout[15] yout[14] yout[13] yout[12] yout[11] yout[10] yout[9] yout[8] 0x00 r 0x06 zout_lsb zout_lsb zout[7] zout[6] zout[5] zout[4] zout[3] zout[2] zout[1] zout[0] 0x00 r 0x07 zout_msb zout_msb zout[15] zout[14] zout[13] zout[12] zout[11] zout[10] zout[9] zout[8] 0x00 r 0x08 status_1 status 1 int_pend fifo_ thresh fifo_full fifo_ empty new_ data mode[2] mode[1] mode[0] 0x00 r 0x09 status_2 status 2 int_ swake int_fifo_ thresh int_fifo_ full int_fifo_ empty int_acq int_wake resv resv 0x00 r 0x0d freg_1 feature 1 spi_en i2c_en spi3_en intsc_en freeze 0 0 0 0x00 w 0x0e freg_2 feature 2 ext_ trig_en ext_ trig_pol fifo_ stream i2cint_ wrclre fifo_ stat_en spi_ stat_en fifo_ burst wrapa 0x00 w 0x0f init_1 initialization 1 0 1 0 0 0 0 1 0 (see note) wo 0x10 mode_c mode control trig_ cmd z_axis_ pd y_axis_ pd x_axis_ pd resv mctrl[2] mctrl[1] mctrl[0] 0x00 w 0x11 rate_1 rate 1 0 0 0 0 rr[3] rr[2] rr[1] rr[0] 0x00 w 0x12 sniff_c sniff control stb_rate [2] stb_rate [1] stb_rate [0] 0 sniff_sr [3] sniff_sr [2] sniff_sr [1] sniff_sr [0] 0x00 w 0x13 sniffth_c sniff threshold control sniff_ mode sniff_ and_or sniff_ th[5] sniff_ th[4] sniff_ th[3] sniff_ th[2] sniff_ th[1] sniff_ th[0] 0x00 w 0x14 sniffcf_c sniff configuration sniff_ reset sniff_ mux[2] sniff_ mux[1] sniff_ mux[0] sniff_ cnten sniff_ thadr[2] sniff_ thadr[1] sniff_ thadr[0] 0x00 w 0x15 range_c range resolution control resv range [2] range [1] range [0] resv res[2] res[1] res[0] 0x00 w 0x16 fifo_c fifo control fifo_ reset fifo_en fifo_ mode fifo_th[4] fifo_th[3] fifo_th[2] fifo_th[1] fifo_th[0] 0x00 w 0x17 intr_c interrupt control int_ swake int_fifo_ thresh int_fifo_ full int_fifo_ empty int_acq int_ wake iah ipp 0x00 r 0x1a init_3 initialization 3 0 0 0 0 0 0 0 0 0x00 rw 0x1b scratch scratchpad 0 0 0 0 0 0 0 0 0x00 rw 0x0a C 0x0c reserved 0x18 C 0x19 reserved
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 32 / 81 ? 201 5 mcube inc. all rights reserved. table 11 . register summary 4 r register s are read - only. w registers are read - write. 'wo' registers are write only. addr name description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 4 0x1c pmcr power mode control resv spm[2] spm[1] spm[0] resv cspm[2] cspm[1] cspm[0] 0x00 w 0x20 dmx drive motion x 0 0 0 0 dnx dpx 0 1 0x00 w 0x21 dmy drive motion y 1 0 0 0 dny dpy 0 0 (see table) w 0x22 dmz drive motion z 0 0 0 0 dnz dpz 0 0 0x00 w 0x24 reset reset reload reset resv resv resv resv resv resv 0x00 w 0x28 init_2 initialization register 2 0 0 0 0 0 0 0 0 0x00 w 0x29 trigc trigger count trigc[7] trigc[6] trigc[5] trigc[4] trigc[3] trigc[2] trigc[1] trigc[0] 0x00 w 0x2a xoffl x-offset lsb xoff[7] xoff[6] xoff[5] xoff[4] xoff[3] xoff[2] xoff[1] xoff[0] per chip w 0x2b xoffh x-offset msb xgain[8] xoff[14] xoff[13] xoff[12] xoff[11] xoff[10] xoff[9] xoff[8] per chip w 0x2c yoffl y-offset lsb yoff[7] yoff[6] yoff[5] yoff[4] yoff[3] yoff[2] yoff[1] yoff[0] per chip w 0x2d yoffh y-offset msb ygain[8] yoff[14] yoff[13] yoff[12] yoff[11] yoff[10] yoff[9] yoff[8] per chip w 0x2e zoffl z-offset lsb zoff[7] zoff[6] zoff[5] zoff[4] zoff[3] zoff[2] zoff[1] zoff[0] per chip w 0x2f zoffh z-offset msb zgain[8] zoff[14] zoff[13] zoff[12] zoff[11] zoff[10] zoff[9] zoff[8] per chip w 0x30 xgain x gain xgain[7] xgain[6] xgain[5] xgain[4] xgain[3] xgain[2] xgain[1] xgain[0] per chip w 0x31 ygain y gain ygain[7] ygain[6] ygain[5] ygain[4] ygain[3] ygain[2] ygain[1] ygain[0] per chip w 0x32 zgain z gain zgain[7] zgain[6] zgain[5] zgain[4] zgain[3] zgain[2] zgain[1] zgain[0] per chip w 0x33 C 0x3f reserved 0x1d C 0x1f reserved 0x23 reserved 0x25 C 0x27 reserved
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 33 / 81 ? 201 5 mcube inc. all rights reserved. 7.2 (0x00) extended status register 1 this register contains status for the i2c address of the device. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x00 ext_stat_1 resv resv re sv resv i2c_ad0 resv resv resv 00000000 r bit name description [ 2:0 ] resv reserved 3 i2c_ad0_bit value of i2c slave address obtained from reading the dout_a1 pin at por. if this bit is 1, the 7 - bit base address of the i2c slave changes from 0x4c to 0 x6c. [ 7:4 ] resv reserved table 12 . extended status re gister 1 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 34 / 81 ? 201 5 mcube inc. all rights reserved. 7.3 (0x01) extended status register 2 the device status register reports various conditions of the device data, clock and sniff circuitry. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x01 ext_stat_2 sniff_ detect sniff_en otp_ busy resv resv 1 pd_clk_ stat ovr_ data 0x04 ro bit name description 0 ovr_data 0: previous acceleration sample has not been overwritten before read by host 1: previous acceleration sample was not read by host and has been overwritten. 1 pd_clk_stat returns the power - down status of the clocks. 0: clocks are enabled. 1: clocks are disabled. [ 4:2 ] resv reserved 5 otp_en otp vdd status bit: 0: otp_vdd supply is not enabled, otp is pow ered down. 1: otp_vdd supply is enabled, otp is powered. 6 sniff_en sniff mode enable flag: 0: sniff mode is not active. 1: sniff mode is active. 7 sniff_detect sniff wakeup or detect flag: 0: no sniff event detected. 1: sniff event detected, move to cwa ke mode. table 13 . extended sta tus register 2 setting s
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 35 / 81 ? 201 5 mcube inc. all rights reserved. 7.4 (0x02 C 0x07) xout, yout & zout data output registers the measurements from sensors for the 3 - axes are available in these 3 registers. the most - significant bit of the value is the sign bit, and is sign extended to the higher bits. software must set only one of the bits spi_en or i2c_en in register 0x0d to 1, depending upon if the i2c or spi interface will be used for external communications. no data will appear in xout, yout a nd zout registers if both the i2c_en bit and spi_en bit are set to 0 (default). when the fifo is enabled, the output of the fifo is mapped to registers 0x02 to 0x07, and the data has a maximum resolution of 12 - bits. during fifo reads, software must start a read at address 0x02 and complete a read to address 0x07 for the fifo pointers to increment correctly. once an i2c start bit has been recognized by the device, registers will not be updated until an i2c stop bit has occurred. therefore, if software desire s to read the low and high byte registers atomically, knowing that the values have not been changed, it should do so by issuing a start bit, reading one register, then reading the other register then issuing a stop bit. note that all 6 registers may be r ead in one burst with the same effect. addr name description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/ w 0x02 xout _lsb xout lsb register xout [7] xout [6] xout [5] xout [4] xout [3] xout [2] xout [1] xout [0] 0x00 r 0x03 xout _msb xo ut msb register xout [15] xout [14] xout [13] xout [12] xout [11] xout [10] xout [9] xout [8] 0x00 r 0x04 yout _lsb yout lsb register yout [7] yout [6] yout [5] yout [4] yout [3] yout [2] yout [1] yout [0] 0x00 r 0x05 yout _msb yout msb register yout [ 15] yout [14] yout [13] yout [12] yout [11] yout [10] yout [9] yout [8] 0x00 r 0x06 zout _lsb zout lsb register zout [7] zout [6] zout [5] zout [4] zout [3] zout [2] zout [1] zout [0] 0x00 r 0x07 zout _msb zout msb register zout [15] zout [14] zout [13] zout [12] zout [11] zout [10] zout [9] zout [8] 0x00 r table 14 . xout, yout, zout data output registers
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 36 / 81 ? 201 5 mcube inc. all rights reserved. 7.5 (0x08) status register 1 this register reports the operational mode of the device. note that the lower 3 - bits, the mode[2:0] field, do not immediately change once a command is written to the mode register, but may take up to 3 transitions of the heartbeat clock. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x08 status_1 int_pend fifo_ thresh fifo_full fifo_ empty new_ data mode[2] mode[1] mode[0] 00000000 ro bit name description [ 2:0 ] mode[2:0] bit field mode comments 000 sleep lowest power mode, regulators on, no clock ac tivity, partial chip power - down 001 standby low power mode, no sampling, clocks active. 010 sniff sniff activity detection mode, sniff enabled, sniff sampling, no fifo operations, automatically transition to cwake mode upon activity detection 011 resv reserved 100 resv reserved 101 cwake continuous wake . active xyz sampling. sniff circu itry not active. 110 swake use sniff logic, main xyz pipeline and optional fifo at the same time; highest power consumption
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 37 / 81 ? 201 5 mcube inc. all rights reserved. 111 trig trigger mode, 1 to 25 4 samples or continuous , return to sleep upon completion 3 new_data 0: no new sample data has a rrived since last read. 1: new sample data has arrived and has been written to fifo/registers. this bit is always enabled and valid, regardless of the settings of any interrupt enable bits. 4 fifo_empty 0: fifo has one or more samples in storage (level) 1 : fifo is empty (level) (default). this bit is set to 1 immediately after device power - up or device reset . 5 fifo_full 0: fifo has space or 1 or more samples (up to 32) (level). 1: fifo is full, all 32 samples are used (level). 6 fifo_thresh 0: amount of data in fifo is less than the threshold (level) 1: amount of data in fifo is equal to or greater than the threshold (level) 7 int_pend 0: no interrupt flags are pending in register 0x09 (level) 1: one or more interrupt flags are pending in register 0x09 (logical or) (level). table 15 . status register 1 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 38 / 81 ? 201 5 mcube inc. all rights reserved. 7.6 (0x09) status register 2 this register reports the state of the interrupts (0 means not pending; 1 means pending) . a bit in this register will only be set if the corre sponding interrupt enable is set to 1 in (0x17) interrupt control register . interrupts can be cleared in the following ways using (0x0e) feature register 2 bit 4: interface method i2c clearing method (default) read register 0x09 i2c clearing method (optional) write register 0x09 spi clearing method write register 0x09 addr name bit por value r/w 7 6 5 4 3 2 1 0 0x09 status_2 int_ swake int_fifo_ thresh int_fifo_ full int_fifo_ empty int_acq int_ wake resv resv 00000000 ro bit name description [ 1:0 ] reserved reserved. 2 int_wake this interrupt will transition when the accelerometer automatically moves from sniff to cwake. once cleared, another sniff to cwake event must take place to retrigger i t. 3 int_acq this interrupt will transition when a new sample is acquired. this flag stays high upon the first sample acquired and will not rearm unless cleared . only active in cwake and trig modes. 4 int_fifo_empty this interrupt will transition when th e fifo is empty. this flag stays high upon the first empty condition and will not rearm unless cleared . t he fifo empty condition must be negated (e.g. the fifo must become not empty), and then empty again for the int_fifo_empty flag to retrigger .
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 39 / 81 ? 201 5 mcube inc. all rights reserved. 5 int_ fifo_full this interrupt will transition when the fifo is full (32 xyz samples) . this flag stays high upon the first full condition and will not rearm unless cleared . t he fifo full condition must be negated (e.g. the fifo must become not full ), and then full again for the int_fifo_ full flag to retrigger . 6 int_fifo_thresh this interrupt will transition when the fifo sample count is equal to or greater than the threshold count 0x16[4:0] . this flag stays high upon the first threshold condition and will not rearm unless cleared . 7 int_swake this interrupt will transition when the sniff block has detected an event only when the device is in swake mode. once an swake interrupt is generated, the sniff block stops processing new events until the interrupt is cl eared and the sniff block is reset. optionally, the sniff block can be reset at the same time int_swake is cleared C see (0x0d) feature register 1 bit 4. table 16 . status register 2 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 40 / 81 ? 201 5 mcube inc. all rights reserved. 7.7 (0x0d) feature register 1 this register is used to select the interface mode as well as the operation style of the fifo and interrupt in swake mode. note: software must set only one of the bits spi_en or i2c_en in register 0x0d to 1, depending upon if the i2c o r spi interface will be used for external communications. no data will appear in xout, yout and zout registers if both the i2c_en bit and spi_en bit are set to 0 (default). addr name bit por value r/w 7 6 5 4 3 2 1 0 0x0d freg_1 spi_en i2c_en spi3_e n intsc_en freeze 0 0 0 00000000 ro bit name description [ 2:0 ] < m ust w rite 000 > software must always write 000 to these 3 bits 3 freeze this bit is designed to be used with fifo stream mode (register 0x0e bit 5) where the fifo is configured to co ntinuously capture new samples and flush the oldest after reaching a fifo full state. 0: fifo operates in standard mode, does not stop capturing data in swake interrupt (default). 1: fifo stops capturing on swake interrupt, software can examine the conditi ons which generated the swake event. 4 intsc_en once an swake interrupt is generated, the sniff block stops processing new events until cleared . enabling this bit allows the sniff block to be reset at the same time the int_swake interrupt is cleared . 0: d o not re - arm sniff block following a swake event (requires the sniff block to be reset by exiting swake mode). (default) 1: clearing the swake interrupt clears and rearms the sniff block for subsequent detections (device may stay in swake mode and continu ing processing subsequent swake events once interrupt is cleared).
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 41 / 81 ? 201 5 mcube inc. all rights reserved. 5 spi3_en 0: spi interface is 4 - wire 1: spi interface is 3 - wire (dout _a1 is the bidirectional pin) 6 i2c_en 0: device interface is still defined as it was at power - up but no data will app ear in xout, yout and zout registers if both this bit and spi_en are set to 0 (default). 1: disables any spi communications. 7 spi_en 0: device interface is still defined as it was at power - up but no data will appear in xout, yout and zout registers if bo th this bit and i2c_en are set to 0 (default). 1: disables any i2c communications. ta ble 17 . feature register 1 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 42 / 81 ? 201 5 mcube inc. all rights reserved. 7.8 (0x0e) feature register 2 this register allows selection of various features for the fifo, external trigger in put, method of interrupt clearing and burst address wrapping . addr name bit por value r/w 7 6 5 4 3 2 1 0 0x0e freg_2 ext_ trig_en ext_ trig_pol fifo_ stream i2cint_ wrc lre fifo_ stat_en spi_ stat_en fifo_ burst wrapa 00000000 ro bit name descript ion 0 wrapa burst read address wrap control. this bit determines the roll - back or wrap address during burst reads. this bit works in i2c mode and both spi modes. 0: burst read cycle address wrap address is 0x07, counter automatically returns to 0x02. (d efault) 1: burst read cycle address wrap address is 0x09, counter automatically returns to 0x02. this setting allows for status registers 0x08 and 0x09 to be included in the burst read. 1 fifo_burst fifo burst feature. this bit enables address increment l ogic which allow s extended atomic burst reads of the fifo greater than the standard 6 - byte (3x16 bits) atomic burst read of xyz data. this bit works in i2c mode and both spi modes. 0: fifo burst read cycles are 6 - bytes in length, 0x02 to 0x07 per read cycl e transaction (default ). 1: fifo burst read cycle can be any number of 6 - byte reads, up to 32 x 6 bytes ( i.e. the entire fifo contents can be read).
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 43 / 81 ? 201 5 mcube inc. all rights reserved. 2 spi_stat_en spi 4 - wire mode spi status token. d uring the first spi write cycle from the host , enabling t his bit will cause the interface to send out system status information on the dout_a1 pin without requiring a separate read cycle. see 6.11 spi status option . 0: no spi status flags are shifted out (default) 1: spi status flags are shifted ou t on the first byte of a ll 4 - wire spi transaction s (spi 3 - wire and i2c mode s are not supported , so no effect will be seen in those modes ). 3 fifo_stat_en fifo status token enable. this bit enables a 4 - bit fifo status token to be appended to the top 4 bits of the z - channel data in every fifo read cycle. this feature works in i2c mode and both spi modes. when enabled, the format of the fifo status token is: 0: fifo stat us feature is disabled, z channel fifo data is not overwritten with fifo status information. (default) 1: fifo status feature is enabled. when the resolution is less than 14 - bits, the top 4 - bits of 16 - bit z channel fifo data are replaced with fifo status i nformation : {[int_pend, fifo_th, fifo_full, fifo_empty], z[11:0]} when the resolution is 14 - bits or above, the botto m 4 - bits are replaced: {[ z[15:4], int_pend, fifo_th, fifo_full, fifo_empty]} 4 i2cint_wrclre clear interrupts on register 0x09 write in i2 c mode. the default method of interrupt clearing is reading register 0x09, the int_status or status_2 register. when this bit is enabled, reads to register 0x09 do not clear pending interrupts. sw must write to register 0x09 (contents do not matter) to cle ar any pending interrupts. note: in spi mode this bit has no effect; spi interrupt clearing requires a write to register 0x09 ; reads are not supported. 0: in i2c mode, interrupts are cleared when reading register 0x09 (default) 1: if i2c_en is 1, then in terrupts are cleared when writing to register 0x09. otherwise i2c reads to register 0x09 will still clear pending interrupts.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 44 / 81 ? 201 5 mcube inc. all rights reserved. 5 fifo_stream fifo stream or continuous write mode. this bit enables the fifo to be used as a moving sample buffer, discarding the oldest sample data when the fifo is full and new sample data arrives. this is intended to work primarily with swake mode, but cwake mode is also supported. note that the fifo_en bit must be set to 1 for this bit to function. fifo stream mode works in i2c mode and both spi modes. 0: fifo steam mode is disabled, fifo stops accepting new data when full (default) 1: fifo stream mode is enabled, fifo discards oldest samples once new data arrives 6 ext_trig_pol external trigger polarity. 0: trigger polarit y is negative edge triggered (default) 1: trigger polarity is positive edge triggered 7 ext_trig_en external trigger mode enable. 0: external trigger mode is not enabled (default) 1: external trigger mode is enabled, use intn pin as the external trigger i nput. this mode is not used with the trig _cmd bit in register 0x10 bit 7. to use this mode, set the trig mode in r egister 0x10 bits [2:0]. table 18 . feature register 2 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 45 / 81 ? 201 5 mcube inc. all rights reserved. 7.9 (0x0f) initialization register 1 software must write a fixed value to this register immediately after power - up or reset. this register will not typically read - back the value which was written ( see below ). addr name bit por value r/w 7 6 5 4 3 2 1 0 0x0f init _ 1 0 1 0 0 0 0 1 0 (see note) w note: duri ng the internal chip start - up sequence, the read - back value will be 0x45. the read - back value will become 0x40 after the start - up sequence completes. after the initialization value of 0x42 is written, the read - back value will be 0x43. bit name description [ 7 :0 ] init_1 software must write a value of 0x42. table 19 . initialization register 1 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 46 / 81 ? 201 5 mcube inc. all rights reserved. 7.10 (0x10) mode control register this register is the primary control register for the accelerometer. the operational mode of the device, x/y/z axis enables, and the trig one - shot mode can be written through this register. t he mode transitions controlled by this register may take up to 3 transitions of the heartbeat clock. depending on the operation, the lower 3 - bits (mctrl[2:0]) may be aut omatically set or cleared by hardware if auto - triggered events are executed. in general, when software sets an operational mode using the mctrl [2:0] bits, there might be a delay time of 2 to 10 msec before the operational mode is reflected by the mode[2:0 ] bits in status register 1. addr name description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 0x10 mode_c mode control trig _ cmd z_axis_pd y_axis_pd x_axis_pd resv mctrl[2] mctrl[1] mctrl[0] 0x00 w bit name description [ 2:0 ] mctrl[2 :0] bit field mode comments 000 sleep lowest power mode, regulators on, no clock activity, partial chip power - down. 001 standby low power mode, no sampling, clocks active. 010 sniff sniff activity detection mode, sniff enabled, no sampling, no fif o operations, automatically transition to cwake mode upon activity detection. 011 reserved reserved 100 reserved reserved 101 cwake continuous wake. active xyz sampling. sniff circuitry not active.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 47 / 81 ? 201 5 mcube inc. all rights reserved. 110 swake use sniff logic, main xyz pipeline a nd optional fifo at the same time; highest power consumption 111 trig trigger mode, 1 to 254 samples or continuous, return to sleep upon completion . 3 resv reserved 4 x_axis_pd 0: x - axis is enabled. 1: x - axis is disabled. 5 y_axis_pd 0: y - axis is ena bled. 1: y - axis is disabled. 6 z_axis_pd 0: z - axis is enabled. 1: z - axis is disabled. 7 trig _ cmd setting this bit will execute a one - shot trigger mode where 1 to 25 4 samples are acquired (or the device will continuously sample if the value is 255 ) . the number of samples is specified by the trig_count in register 0x29. trig mode can only be started from standby. unless the value is 255, after the number of samples is complete d , the device will return to standby mode. table 20 . mod e control register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 48 / 81 ? 201 5 mcube inc. all rights reserved. 7.11 (0x11) rate register 1 this register configures the sample rates for wake modes. the rates also depend upon the value in register 0x 1c . the device has several power modes which can be adjusted to achieve a desired power consump tion at a certain odr. the tradeoff for lower power is either higher noise or lower odr. see the table below. note: the power mode bits referenced in 0x1c are different than for the sniff rates. note: software must set bits [7:4] to 0. addr name bit por val ue r/w 7 6 5 4 3 2 1 0 0x11 r ate_ 1 0 0 0 0 rr[3] rr[2] rr[1] rr[0] 00000000 rw register 0x11 value ultra - low power (0x 1c [2:0] =>0x03) low power (0x 1c [2:0] =>0x00) precision (0x 1c [2:0] =>0x0 4 ) cwake odr (hz) current (a) cwake odr (hz) current (a) c wake odr (hz) current (a) 0x05 n/a 14 1 14 5 0x06 25 0.9 28 1.6 28 10 0x07 50 1.6 54 2.7 55 18 0x08 100 2.8 105 5 80 25 0x09 190 5.5 210 11 n/a 0x0a 380 10 400 19 n/a 0x0b 750 18 600 26 n/a 0x0 c 1100 26 n/a n/a 0x0f * note 1300 36 750 36 100 36 ta ble 21 . rate register 1 settings note: specific setup steps are required in order to set up register 0x11 value 0x0f (rate 15) , as shown below . these steps are not required when using the other modes :
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 49 / 81 ? 201 5 mcube inc. all rights reserved. step write r egister a ddress values to be written comment ulp lp precision 1 0x24 0x40 reset 2 0x 0f 0x42 initialization step 3 0x 20 0x01 initialization step 4 0x21 0x80 initialization step 5 0x 28 0x00 initialization step 6 0x 1a 0x00 initialization step 7 0x10 0x01 go to standby 8 0x15 (0x04 or other) 9 0x16 (0x5d or other) 10 0x1c 0x03 0x00 0x04 c hoose mode 1 1 0x11 0x10 point to set wake/sniff settings 1 2 0x29 0x03 rate 15 setup 1 for cwake 1 3 0x11 0x20 rate 15 setup 2 for cwake 1 4 0x29 0x01 rate 15 setup 3 for cwake 1 5 0x11 0x40 point to value 1 1 6 0x29 0x52 0x72 0x32 write value 1 1 7 0x11 0x50 point to value 2 1 8 0x29 0x01 0x02 0x12 write value 2 1 9 0x11 0x0f apply the values 20 0x10 0x05 go to cwake table 22 . setup s teps for cwake using rate 15
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 50 / 81 ? 201 5 mcube inc. all rights reserved. 7.12 (0x12) sniff control register this register selects the sample rate for sniff mode and the clock rate for standby mode. note: the power mode bits referenced in 0x1c are different than for the wake rates. note: software must always write 0 to bit 4. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x12 sniff_c stb_rate[2] stb_rate[1] stb_rate[0] 0 sniff_sr [3] sniff_sr [2] sniff_sr [1] sniff_sr [0] 00000000 rw bit name description [3:0] sniff_sr[3:0] approximate typical maxim um clock rate when trigger count > 1 (hz) bit field ultra - low power (0x1c[6:4]=>0x03) low power (0x1c[6:4]=>0x00) precision (0x1c[6:4]=>0x04) 0000 (default) 6 7 7 0001 0. 4 0.4 0.2 0010 0.8 0.8 0.4 0011 1.5 1.5 0.9 0100 6 7 7 0101 13 14 14 0110 25 28 28 0111 50 54 55 1000 100 105 80 1001 190 210 n / a 1010 380 400 n / a
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 51 / 81 ? 201 5 mcube inc. all rights reserved. 1011 750 600 n / a 1100 1100 n / a n / a 1101 n / a n / a n / a 1110 n / a n / a n / a 1111 * note 1300 750 100 4 0 software must always write 0 to this bit. [7:5 ] stb_rate[2:0] approximate typical maximum clock rate when trigger count > 1 (hz) bit field ultra - low power (0x1c[6:4]=>0x03) low power (0x1c[6:4]=>0x00) precision (0x1c[6:4]=>0x04) 000 (default) 1 0.5 0.1 001 3 1 0.2 010 5 3 0.4 011 10 6 0 .8 100 23 12 1.5 101 45 24 3 110 90 48 5 111 180 100 10 table 23 . sniff control register settings note: specific setup steps are required in order to set up register 0x12 value 0x0f (rate 15) for sniff, as shown belo w . these steps are not required when using the other modes :
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 52 / 81 ? 201 5 mcube inc. all rights reserved. step write r egister a ddress values to be written comment ulp lp precision 1 0x24 0x40 reset 2 0x 0f 0x42 initialization step 3 0x 20 0x01 initialization step 4 0x21 0x80 initialization ste p 5 0x 28 0x00 initialization step 6 0x 1a 0x00 initialization step 7 0x10 0x01 go to standby 8 0x15 (0x04 or other) 9 0x16 (0x5d or other) 10 0x1c 0x30 0x00 0x40 choose mode 1 1 0x11 0x10 point to set wake/sniff settings 1 2 0x29 0x 30 rate 15 setup 1 for sniff 1 3 0x11 0x30 rate 15 setup 2 for sniff 1 4 0x29 0x01 rate 15 setup 3 for sniff 1 5 0x11 0x60 point to value 1 1 6 0x29 0x52 0x72 0x32 write value 1 1 7 0x11 0x70 point to value 2 1 8 0x29 0x01 0x02 0x12 write value 2 1 9 0x11 0x0f apply the values 20 0x10 0x02 go to sniff table 24 . setup steps for sniff using rate 15
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 53 / 81 ? 201 5 mcube inc. all rights reserved. 7.13 (0x13) sniff threshold control register this register sets the threshold values used by the sniff logic for activity detection. for eac h axis, a delta count is generated and compared to the threshold. when the delta count is greater than the threshold, a sniff wakeup event occurs. there is a unique sniff threshold for each axis, and a n optional false detection count which requires multi ple sniff detec tion events to occur before a wakeup condition is declared . these features are set by six shadow registers accessed by reg ister 0x13[5:0] and register 0x14 bits [2:0]. the sniff block supports the logical and or or of the x/y/z sniff wakeup flags when gene rating a sniff wakeup interrupt. the sniff block supports two methods of calculating sniff delta counts: ? current sample to previous sample (c2p) o the current sample and the immediate previous sample are subtracted to generate a delta ? current sample to baseline (c2b) o the current sample and the first sample captured when entering sniff mode are subtracted to generate a delta. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x13 sniffth_c sniff_ mode sniff_ and_or sniff_th[5] sniff_th [4] sniff _th [3] sniff_th [2] sniff_th[1] sniff_th[0] 00000000 rw bit name description [ 5:0 ] sniff_th[5:0] this 6 - bit field accesses six shadow registers behind address 0x13 . register 0x14 bits [2:0] control which register is accessed. reg 0x14 sniff_t_addr[2:0 ] reg 0x13 sniff_th[5:0] 000 none 001 sniff threshold, x - axis sniff_th_x[5:0], unsigned threshold value 0 to 63 (independent from y and z thresholds).
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 54 / 81 ? 201 5 mcube inc. all rights reserved. 010 sniff threshold, y - axis sniff_th_y[5:0], unsigned threshold value 0 to 63 (independent from x and z thresholds). 011 sniff threshold, z - axis sniff_th_z[5:0], unsigned threshold value 0 to 63 (independent from x and y thresholds). 100 none 101 sniff detection count, x - axis sniff_x_count[5:0], unsigned sniff event count, 1 to 62 events, in dependent from other channels. the detection count is count - 1 for the desired number of events (for 1 event = 1 - 1 => 0 loaded into register). 110 sniff detection count, y - axis sniff_y_count[5:0], unsigned sniff event count, 1 to 62 events, independent f rom other channels. the detection count is count - 1 for the desired number of events (for 1 event = 1 - 1 => 0 loaded into register). 111 sniff detection count, z - axis sniff_z_count[5:0], unsigned sniff event count, 1 to 62 events, independent from other c hannels. the detection count is count - 1 for the desired number of events (for 1 event = 1 - 1 => 0 loaded into register).
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 55 / 81 ? 201 5 mcube inc. all rights reserved. 6 sniff_and_or sets the logical mode for combining of x/y/z sniff wakeup events before an interrupt is generated. to remove one of the channels (axis) from the equation, use the corresponding axis pd bit in register 0x10 bits [6:4]. 0: or - sniff wakeup/interrupt is triggered when any of the active channels have met detection threshold and count requirements (default). sniff wakeup = (ab s(x) C x sniff threshold) or (abs(y) C y sniff threshold) or (abs(z) C z sniff threshold) 1: and - sniff wakeup/interrupt is triggered when all active channels have met detection threshold and count requirements. sniff wakeup = (abs(x) C x sniff thr eshold) and (abs(y) C y sniff threshold) and (abs(z) C z sniff threshold) 7 sniff _mode this bit determines how the sniff block computes its delta count. 0: c2p mode (current to previous): the delta count between current and previous samples is a movi ng window. the sniff logic uses the current sample and the immediate previous sample to compute a delta (default). 1: c2b mode (current to baseline): the delta count is generated from subtracting the current sample from the first sample stored when enterin g sniff mode. table 25 . sniff threshold control register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 56 / 81 ? 201 5 mcube inc. all rights reserved. 7.14 (0x14) sniff configuration register this register selects which of the six shadow register s is being accessed in register 0x13, and controls settings of the sniff hardware. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x14 sniffcf_c sniff_ reset sniff_ mux[2] sniff_ mux[1] sniff_ mux[0] sniff_ cnten sniff_ thadr[2] sniff_ thadr[1] sniff_ thadr[0] 00000 000 rw bit name description [ 2:0 ] sniff_ thadr[2:0] bi t field register selected by 0x13[5:0] 000 none 001 sniff threshold, x - axis 010 sniff threshold, y - axis 011 sniff threshold, z - axis 100 none 101 sniff detection count, x - axis 110 sniff detection count, y - axis 111 sniff detection cou nt, z - axis 3 sniff_ cnten this bit enables the sniff detection counts for all channels. 0: do not use sniff detection counters. (default) 1: enable sniff detection counts, required for valid sniff wakeup [ 6:4 ] sniff_ mux[2:0] this field d etermines which 6 - bits of the 11 - bit delta count will be compared against the 6 - bit threshold value for each channel. clamp logic allows any sniff delta exceeding the selected 6 - bit range to still be detected as a valid event. see examples below.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 57 / 81 ? 201 5 mcube inc. all rights reserved. bit field bit range se lected 000 delta[5:0] 001 delta[6:1] 010 delta[7:2] 011 delta[8:3] 100 delta[9:4] 101 delta[10:5] 110 delta[10:5] 111 delta[10:5] 7 sniff_ reset this is the manual reset bit for the sniff block. this bit is not self - clearing, and c an be used to re - enable the sniff block after a sniff event has been detected in swake mode . 0: sniff block reset is not applied (default). 1: sniff block reset is applied. table 26 . sniff configuration register settings some exam ple settings for the sniff_mux field are shown below: sniff noise/power configuration g threshold [5:0] sniff mux sel [2:0] example use case ultra - low power low 3 0 human motion detection @ sr = 6.5 hz and sniff mode = current to baseline med 10 0 high 28 0 tap detection @ sr = 51 hz and sniff mode = current to previous low power low 5 0 med 5 0 high 56 0 precision x low 3 0 low 37 0 med 37 2 high 56 3
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 58 / 81 ? 201 5 mcube inc. all rights reserved. 7.15 (0x15) range and resolution control register the range register sets the r esolution and range options for the accelerometer. all numbers are sign - extended, 2s complement format. all results are reported in registers 0x02 to 0x07. when the fifo is enabled, only 6 to 12 - bit resolutions are supported due to the 12 - bit width of th e fifo. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x15 range_c resv range[2] range[1] range[0] resv res[2] res[1] res[0] 00000000 rw bit name description [ 2:0 ] res[2:0] bit field bit width of accelerometer data 000 6 bits 001 7 bits 01 0 8 bits 011 10 bits 100 12 bits 101 14 bits (only 12 - bits if fifo enabled) 110 reserved 111 reserved 3 resv reserved [ 6:4 ] range[2:0] bit field g range selection 000 2g 001 4g 010 8g
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 59 / 81 ? 201 5 mcube inc. all rights reserved. 011 16g 100 12g 101 reserved 110 reserved 111 reserved 7 resv reserved table 27 . range and resolution control register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 60 / 81 ? 201 5 mcube inc. all rights reserved. 7.16 (0x16) fifo control register this register selects the fifo threshold level, operation mode, fifo reset and enable. with the ex ception of fifo_reset, the fifo_en bit must be 1 for any fifo interrupts, thresholds, or modes to be enabled. the fifo flags in register 0x08 will continue to report fifo defaults even if the fifo_en is 0. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x16 fifo_c fifo_ reset fifo_en fifo_ mode fifo_th [4] fifo_th [3] fifo_th [2] fifo_th [1] fifo_th [0] 00000000 rw bit name description [ 4:0 ] fifo_th[4:0] the fifo threshold level selects the number of samples in the fifo for different fifo events. the threshold value may be 1 to 31 (00001 to 11111). 5 fifo_mode 0: normal operation, the fifo continues to accept new sample data as long as there is space remaining (default) 1: watermark, once the amount of samples in the fifo reaches or exceeds the t hreshold level, the fifo stops accepting new sample data. any additional sample data is dropped. 6 fifo_en fifo enable control. all fifo operations are gated by this bit. 0: no fifo operation, sample data written directly to output registers. 1: fifo en abled, all sample data written to fifo write port if there is room. the fifo write clock is controlled by this enable, resulting in higher dynamic power. 7 fifo_reset asynchronous fifo reset. 0: fifo reset is disabled, normal operation (default) 1: fifo r ead and write pointers are cleared, fifo contents returned to 0 table 28 . fif o control register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 61 / 81 ? 201 5 mcube inc. all rights reserved. 7.17 (0x17) interrupt control register addr name bit por value r/w 7 6 5 4 3 2 1 0 0x17 intr_c int_ s wake int_fifo_ thresh i nt_fifo_ full int_fifo_ empty int_acq int_ wake iah ipp 00000000 rw bit name description 0 ipp intn pin interrupt pin mode control. 0: intn pin is configured for open - drain mode (external pullup to vddio required) (default). 1: intn pin is configured fo r active drive or push - pull mode. drive level is to vddio. 1 iah interrupt level control, sets the active drive level of the intn pin. 0: interrupt request is active low (default) . 1: interrupt request is active high. 2 int_wake wake interrupt (sniff t o wake) enable 0: no interrupt is generated when sniff activity is detected and the device auto - transitions to cwake mode (default). 1: generate an interrupt when activity is detected in sniff mode and the device auto - transitions to cwake mode. 3 int_acq interrupt on sample or acquisition enable 0: no interrupt generated when new sample data is acquired (default). 1: generate an interrupt when new sample data is acquired (applies to new data written to output registers or fifo). this enable is paired with the new_data flag in register 0x08. 4 int_fifo_empty fifo empty interrupt enable. 0: no interrupt is generated when the fifo is empty or completely drained of sample data (default). 1: generate an interrupt when the fifo is empty. this interrupt is paired with the fifo_empty flag in register 0x08. note that this interrupt is independent of the fifo threshold level, and will only activate when the fifo sample count has reached a value of 0.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 62 / 81 ? 201 5 mcube inc. all rights reserved. 5 int_fifo_full fifo full interrupt enable. 0: no interrupt is gen erated when the fifo is empty or comple tely filled of sample data (default). 1: generate an interrupt when the fifo is full. this interrupt is paired with the fifo_full flag in register 0x08. note that this interrupt is independent of the fifo threshold le vel, and will only activate when the fifo sample count has reached a value of 32. 6 int_fifo_thresh fifo threshold interrupt enable. 0: no interrupt is generated when the fifo threshold level is reached (default). 1: generate an interrupt when the fifo th reshold level is reached. 7 int_ swake this interrupt is valid only in swake mode. 0: no interrupt generated when sniff activity is detected (default). 1: generate an interrupt when sniff activity is detected. table 29 . interrupt c ontrol register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 63 / 81 ? 201 5 mcube inc. all rights reserved. 7.18 (0x1a) initialization register 3 software must write a fixed value to this register immediately after power - up or reset. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x1a init_3 0 0 0 0 0 0 0 0 00000000 rw bit name descrip tion [7:0] init_3 software must write 0 to these bits table 30 . initialization register 3 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 64 / 81 ? 201 5 mcube inc. all rights reserved. 7.19 (0x1b) scratchpad register this register can store any 8 - bit value and has no effect on hardware. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x1b scratch 0 0 0 0 0 0 0 0 00000000 rw bit name description [7:0] scratch any value can be written and read - back. table 31 . scratchpad register
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 65 / 81 ? 201 5 mcube inc. all rights reserved. 7.20 (0x1c) power mode control register this register selects the power setting for cwake, swake and sniff modes. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x1 c pmcr resv spm[2] spm[1] spm[0] resv cspm[2] cspm[1] cspm[0] 00000000 rw bit name description [ 2 :0 ] cspm cwake, swake power mode 000: low power mode ( nominal noise levels) (default) 001: reserved 010: reserved 011: ultra - low power mode (highest noise levels) 100: precision mode (lowest noise levels) 101: reserved 110: reserved 111: reserved 3 resv reserved [ 6:4 ] spm sniff power mode 000: low power mod e (nominal noise levels) (default) 001: reserved 010: reserved 011: ultra - low power mode (highest noise levels) 100: precision mode (lowest noise levels) 101: reserved 110: reserved 111: reserved 7 resv reserved table 32 . power mo de control register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 66 / 81 ? 201 5 mcube inc. all rights reserved. 7.21 (0x20) drive motion x register this register controls the test mode which moves the sensor in the x axis direction. note: software must always write 0 to bits [7:4] and 1. note: software must always write 1 to bit 0 . addr na me bit por value r/w 7 6 5 4 3 2 1 0 0x20 dmx 0 0 0 0 dnx dpx 0 1 00000000 w bit name description 0 1 reserved. always write 1 to this bit 1 0 reserve d. always write 0 to this bit. 2 dpx 0: disabled (default) 1: move the sensor in x positive dir ection 3 dnx 0: disabled (default) 1: move the sensor in x negative direction [ 7:4 ] 0000 reserved. always write 0 to these bits. table 33 . drive motion x register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 67 / 81 ? 201 5 mcube inc. all rights reserved. 7.22 (0x21) drive motion y register this register controls th e test mode which moves the sensor in the y axis direction. note: software must always write 0 to bits [ 6 :4] and [1:0]. note: software must always write 1 to bit 7 after writing to register 0x20[0] . addr name bit por value r/w 7 6 5 4 3 2 1 0 0x21 dmy 1 0 0 0 dny dpy 0 0 (see table ) rw mode (mctlr[2:0] bits in mode_c register 0x10) read - back value sniff, cwake, swake, trig 0x80 sleep, standby 0x00 table 34 . register 0x21 read - back value bit name description [ 1:0 ] 00 r eserved. always write 0 to these bits. 2 dpy 0: disabled (default) 1: move the sensor in y positive direction 3 dny 0: disabled (default) 1: move the sensor in y negative direction [ 6 :4 ] 000 reserved. always write 0 to these bits. 7 1 reserv ed. always write 1 to this bit . table 35 . drive motion y register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 68 / 81 ? 201 5 mcube inc. all rights reserved. 7.23 (0x22) drive motion z register this register controls the test mode which moves the sensor in the z axis direction. note: software must always write 0 to bits [7:4] and [1:0]. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x22 dmz 0 0 0 0 dnz dpz 0 0 00000000 rw bit name description [ 1:0 ] 00 reserved. always write 0 to these bits. 2 dpz 0: disabled (default) 1: move the sensor in z positive direction 3 dnz 0 : disabled (default) 1: move the sensor in z negative direction [ 7:4 ] 0000 reserved. always write 0 to these bits. table 36 . drive motion z register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 69 / 81 ? 201 5 mcube inc. all rights reserved. 7.24 (0x24) reset register this register can be used to reset the device. an ytime there is a reset to the device , a por event , or a power cycle the spi 3 - wire configuration will reset to 4 - wire mode. addr name bit por value r/w 7 6 5 4 3 2 1 0 0x24 reset reload reset resv resv resv resv resv resv 00000000 rw bit name desc ription [ 5:0 ] reserved reserved 6 reset 0: normal operation (default) 1: force a power - on - reset (por) sequence. otp contents are reloaded into registers, aofs contents are decompressed, and any other registers are returned to their default. this bit is s elf - clearing. 7 reload 0: normal operation (default) 1: reloads the registers from otp. a reload operation enables otp core for reading, performs a complete read of otp into the register file, and then disables the otp. use register 0x01 bit 5 to monitor the otp_busy bit. this bit must be cleared by software table 37 . reset register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 70 / 81 ? 201 5 mcube inc. all rights reserved. 7.25 (0x2 8 ) initialization register 2 software must write a fixed value to t his register immediately after power - up or reset . addr name bit por value r/w 7 6 5 4 3 2 1 0 0x28 init _ 2 0 0 0 0 0 0 0 0 00000000 rw bit name descr iption [ 7 :0 ] init_2 software must write 0 to these bits table 38 . initialization register 2 settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 71 / 81 ? 201 5 mcube inc. all rights reserved. 7.26 (0x29) trigger count register this re gister selects the number of samples to be taken after the one - shot trigger is started . addr name bit por value r/w 7 6 5 4 3 2 1 0 0x29 trig c trig c [7] trig c [6] trig c [5] trig c [4] trig c [3] trig c [2] trig c [1] trig c [0] 00000000 rw bit name descriptio n [ 7 :0] trig c [7:0] selects the number of samples to be captured after the one - shot trigger is started. range from 1 to 254. when value 255 is chosen , the device will run continuously until the mode in register 0x10 is changed. table 39 . trigger register settings
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 72 / 81 ? 201 5 mcube inc. all rights reserved. 7.27 (0x2a C 0x2b) x - axis offset registers this register contains a signed 2s complement 15 - bit value applied as an offset adjustment to the output of the acceleration values, prior to being sent to the out_ex registers. the p ower - on - reset value for each chip is unique and is set as part of factory calibration. if necessary, this value can be overwritten by software. note: when modifying these registers with new gain or offset values, software should perform a read - modify - writ e type of access to ensure that unrelated bits do not get changed inadvertently. addr name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 0x2a xoffl xoff[7] xoff[6] xoff[5] xoff[4] xoff[3] xoff[2] xoff[1] xoff[0] per chip w 0x2b xoffh xga in[8] xoff[14] xoff[13] xoff[12] xoff[11] xoff[10] xoff[9] xoff[8] per chip w table 40 . x - axis offset registers
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 73 / 81 ? 201 5 mcube inc. all rights reserved. 7.28 (0x2c C 0x2d) y - axis offset registers this register contains a signed 2s complement 15 - bit value applied as an offset adjustment to the output of the acceleration values, prior to being sent to the out_ex registers. the power - on - reset value for each chip is unique and is set as part of factory calibration. if necessary, this value can be overwritten by software. note: w hen modifying these registers with new gain or offset values, software should perform a read - modify - write type of access to ensure that unrelated bits do not get changed inadvertently. addr name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/ w 0x2c yoffl yoff[7] yoff[6] yoff[5] yoff[4] yoff[3] yoff[2] yoff[1] yoff[0] per chip w 0x2d yoffh ygain[8] yoff[14] yoff[13] yoff[12] yoff[11] yoff[10] yoff[9] yoff[8] per chip w table 41 . y - axis offset regi sters
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 74 / 81 ? 201 5 mcube inc. all rights reserved. 7.29 (0x2e C 0x2f) z - axis offset registers this register contains a signed 2s complement 15 - bit value applied as an offset adjustment to the output of the acceleration values, prior to being sent to the out_ex registers. the power - on - reset value for each chip is unique and is set as part of factory calibration. if necessary, this value can be overwritten by software. note: when modifying these registers with new gain or offset values, software should perform a read - modify - write type of access to ensure that unrelated bits d o not get changed inadvertently. addr name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 0x2e zoffl zoff[7] zoff[6] zoff[5] zoff[4] zoff[3] zoff[2] zoff[1] zoff[0] per chip w 0x2f zoffh zgain[8] zoff[14] zoff[13] zoff[12] zoff[11] zoff[1 0] zoff[9] zoff[8] per chip w table 42 . z - axis offset registers
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 75 / 81 ? 201 5 mcube inc. all rights reserved. 7.30 (0x2b & 0x30) x - axis gain registers the gain value is an unsigned 9 - bit number. note: when modifying these registers with new gain or offset values, software should perform a read - modify - write type of access to ensure that unrelated bits do not get changed inadvertently. addr name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 0x2b xoffh xgain[8] xoff[14] xoff[13] xoff[12] xoff[11] xoff[10] xoff[9] x off[8] per chip w 0x30 xgain xgain[7] xgain[6] xgain[5] xgain[4] xgain[3] xgain[2] xgain[1] xgain[0] per chip w table 43 . x - axis gain registers
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 76 / 81 ? 201 5 mcube inc. all rights reserved. 7.31 (0x2d & 0x31) y - axis gain registers the gain value is an unsigned 9 - bit number. note : when modifying these registers with new gain or offset values, software should perform a read - modify - write type of access to ensure that unrelated bits do not get changed inadvertently. addr name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 0x2d yoffh ygain[8] yoff[14] yoff[13] yoff[12] yoff[11] yoff[10] yoff[9] yoff[8] per chip w 0x31 ygain ygain[7] ygain[6] ygain[5] ygain[4] ygain[3] ygain[2] ygain[1] ygain[0] per chip w table 44 . y - axis gain registers
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 77 / 81 ? 201 5 mcube inc. all rights reserved. 7.32 (0x2f & 0x32) z - axis gain registers the gain value is an unsigned 9 - bit number. note: when modifying these registers with new gain or offset values, software should perform a read - modify - write type of access to ensure that unrelated bits do not get changed ina dvertently. addr name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 por value r/w 0x2f zoffh zgain[8] zoff[14] zoff[13] zoff[12] zoff[11] zoff[10] zoff[9] zoff[8] per chip w 0x32 zgain zgain[7] zgain[6] zgain[5] zgain[4] zgain[3] zgain[2] zgain[1] zga in[0] per chip w table 45 . z - axis gain registers
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 78 / 81 ? 201 5 mcube inc. all rights reserved. 8 index of tables table 1. order information ................................ ................................ ................................ ..................... 5 table 2. pin description ................................ ................................ ................................ ......................... 9 table 3. absolute maximum ratings ................................ ................................ ................................ .... 15 table 4. sensor cha racteristics ................................ ................................ ................................ ........... 16 table 5. electrical characteristics C voltage and current ................................ ................................ .... 17 table 6. electrical characteristics C interface ................................ ................................ ...................... 18 table 7. i2c timing characteristics ................................ ................................ ................................ ..... 19 table 8. spi inte rface timing parameters ................................ ................................ ........................... 20 table 9. operational modes ................................ ................................ ................................ ................. 23 table 10. i2c address selection ................................ ................................ ................................ .......... 25 table 11. register summary ................................ ................................ ................................ ............... 32 table 12. extended status register 1 settings ................................ ................................ .................... 33 table 13. extended status register 2 settings ................................ ................................ .................... 34 table 14. xout, yout, zout data out put registers ................................ ................................ ........ 35 table 15. status register 1 settings ................................ ................................ ................................ .... 37 table 16. status register 2 settings ................................ ................................ ................................ .... 39 table 17. feature register 1 settings ................................ ................................ ................................ .. 41 table 18. feature register 2 settings ................................ ................................ ................................ .. 44 table 19. initialization register 1 settings ................................ ................................ ........................... 45 table 20. mode control register settings ................................ ................................ ............................ 47 table 21. rat e register 1 settings ................................ ................................ ................................ ...... 48 table 22. setup steps for cwake using rate 15 ................................ ................................ ............. 49 table 23. sniff control register settings ................................ ................................ ............................. 51 table 24. setup steps for sniff using rate 15 ................................ ................................ ................. 52 table 25. sniff threshold control register settings ................................ ................................ ............. 55 table 26. sniff configuration register settings ................................ ................................ .................... 57 table 27. range and resolution control register settings ................................ ................................ . 59 table 28. fifo control register settings ................................ ................................ ............................ 60 table 29. int errupt control register settings ................................ ................................ ....................... 62 table 30. initialization register 3 settings ................................ ................................ ........................... 63 table 31. scratchpad register ................................ ................................ ................................ ............. 64 table 32. power mode control register settings ................................ ................................ ................. 65
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 79 / 81 ? 201 5 mcube inc. all rights reserved. table 3 3. drive motion x register settings ................................ ................................ .......................... 66 table 34. register 0x21 read - back value ................................ ................................ .......................... 67 table 35. drive motion y register settings ................................ ................................ .......................... 67 table 36. drive motion z register settings ................................ ................................ .......................... 68 table 37. r eset register settings ................................ ................................ ................................ ....... 69 table 38. initialization register 2 settings ................................ ................................ ........................... 70 table 39. trigger register settings ................................ ................................ ................................ ...... 71 table 40. x - axis offset registers ................................ ................................ ................................ ........ 72 table 41. y - axis of fset registers ................................ ................................ ................................ ........ 73 table 42. z - axis offset registers ................................ ................................ ................................ ........ 74 table 43. x - axis gain registers ................................ ................................ ................................ .......... 75 table 44. y - axis gain registers ................................ ................................ ................................ .......... 76 table 45. z - axis gain registers ................................ ................................ ................................ .......... 77
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 80 / 81 ? 201 5 mcube inc. all rights reserved. 9 revision history date revision description 2015 - 1 0 aps - 048 - 004 4 v 1 .0 first release. 2015 - 12 aps - 048 - 0044v1. 1 added register details. 2015 - 12 aps - 048 - 0044v1.2 updated spi clock speed parameters. co rrected pinout s in table . added scratchpad register. corrected some typos.
mc 3635 3 - axis accelerometer preliminary datasheet mcube proprietary aps - 048 - 0044v1.2 81 / 81 ? 201 5 mcube inc. all rights reserved. 10 legal 1. m - cube reserves the right to make corrections, modifications, enhancements, improvements and other changes to its products and to this document at any time an d discontinue any product without notice. the information contained in this document has been carefully checked and is believed to be accurate. however, m - cube shall assume no responsibilities for inaccuracies and make no commitment to update or to keep cu rrent the information contained in this document. 2. m - cube products are designed only for commercial and normal industrial applications and are not suitable for other purposes, such as: medical life support equipment; nuclear facilities; critical care equ ipment; military / aerospace; automotive; security or any other applications, the failure of which could lead to death, personal injury or environmental or property damage. use of the products in unsuitable applications are at the customers own risk and e xpense. 3. m - cube shall assume no liability for incidental, consequential or special damages or injury that may result from misapplication or improper use of operation of the product. 4. no license, express or implied, by estoppel or otherwise, to any inte llectual property rights of m - cube or any third party is granted under this document. 5. m - cube makes no warranty or representation of non - infringement of intellectual property rights of any third party with respect to the products. m - cube specifically ex cludes any liability to the customers or any third party regarding infringement of any intellectual property rights, including the patent, copyright, trademark or trade secret rights of any th ird party, relating to any combination, machine, or process in w hich the m - cube products are used. 6. examples of use described herein are provided solely to guide use of m - cube products and merely indicate targeted characteristics, performance and applications of products. m - cube shall assume no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein 7. information described in this document including parameters, application circuits and its constants and calculation formulas, progra ms and control procedures are provided for the purpose of explaining typical operation and usage. typical parameters that may be provided in m - cube data sheets and/or specifications can and do vary in different applications and actual performance may var y over time. all operating parameters including typicals, must be validated for each customer application by customers technical experts. in no event shall the information described be regarded as a guarantee of conditions or characteristics of the pro ducts. therefore, the customer should evaluate the design sufficiently as whole system under the consideration of various external or environmental conditions and determine their application at the customers own risk. m - cube shall assume no responsibility or liability for claims, damages, costs and expenses caused by the customer or any third party, owing to the use of the above information. is a trademark of m - cube, inc. m - cube and the m - cube logo are trademarks of m - cube, inc., all other product or se rvice names are the property of their respective owners. ? m - cube, inc. 201 5 . all rights reserved.

▲Up To Search▲

Price & Availability of MC3635

	To Download MC3635 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .